Research Website: www.albany.edu/facultyresearch/nanodesign_group/

Degrees:

• Ph.D., Electrical and Computer Engineering, Concordia University, Montreal, Canada, 2002
• B.S., Electrical and Computer Engineering, Beijing University of Aeronautics, Beijing, China, 1992

Areas of research:

• Modeling and simulation of nanoscale devices and interconnects
• CMOS-nano hybrid circuits
• 3D IC
• FPGA and ASIC design
• Computer arithmetic and cryptography

Professional experience:

• 2005-2007: Assistant Professor, ECE Department, Indiana University - Purdue University Indianapolis, Indianapolis, IN, USA

• 2002-2004: Assistant Professor, ECE Department, University of Western Ontario, London, ON, Canada
  
  
• 2000-2002: IC and FPGA Design Engineer, EMS Technology Inc. Montreal, Canada 
  

Professional achievements:

• Inventor of 3D CMOL to build CMOS-nanowire hybrid systems. 

• Inventor of rFPGA and nFPGA to utilize nanodevices in FPGA.

Awards and honors:

• 2005 CCECE Best Paper Award

• 2004 IUPUI Research Initiative Award 
   
• 2004 Canadian Foundation of Innovation Award (Nanotechnology)
  

Recent invited talks:

CMOS-nano hybrid technology - NanoFPGA-related study, Purdue University, March 2007.

Application of nanotechnology to IC development, Peking University, June 2007.

Bistable junction nanodevices, Chinese Academy of Science, August 2007.

3D CMOL design and implementation, Polytech University, Nov. 2007.

Recent publications:

R. Zhang, A. Dounavis, and Wei Wang, Passive Reduced-order Macromodeling Algorithm for Microelectromechanical Systems, Accepted by IEEE/ASME Journal of Microelectromechanical Systems.

W. Guan, M. Liu and Wei Wang, Nonpolar nonvolatile resistive switching in Cu doped ZrO₂, IEEE Electron Device Letters, in press.

Woon Ket Wong and Wei Wang, Application of modified Arnoldi algorithm to passive reduced-order macromodeling of MEMS/NEMS devices, Journal of Nanoscience and Nanotechnology, in press.

L. Shang, M. Liu, S. Tanachutiwat, and W. Wang, Diameter-dependant thermal conductance models of carbon nanotubes, Inter. Journal of NanoParticles, in press.

S. Haruehanroengra and Wei Wang, Analyzing conductance of carbon nanotube bundles, Journal of Nanoscience and Nanotechnology, in press.

Deyu Tu, Ming Liu, Wei Wang, and S. Haruehanroengra, 3D integration of CMOS molecular hybrid circuits, Journal of Nanoscience and Nanotechnology, in press.

C. Dong, D. Liu, S. Haruehanroengra, and W. Wang, 3D nFPGA: A reconfigurable architecture for 3D CMOS/nanomaterial hybrid digital circuits, IEEE Trans. Circuits and Systems I, Vol.54, No. 1, pp. 2489 - 2501, Nov. 2007.

S. Haruehanroengra and W. Wang, Analyzing conductance of mixed carbon nanotube bundles for interconnect applications, IEEE Electron Device Letters, vol. 28, no. 8, pp. 756-759, Aug. 2007.

L. Shang, M. Liu, S. Haruehanroengra, and W. Wang, Inductance of mixed carbon nanotube bundles, IEE Micro and Nano Letters, vol. 2, no. 2, pp. 35-39, June 2007.

D. Tu, M. Liu, W. Wang, and S. Haruehanroengra, 3D CMOL: A 3D FPGA using CMOS/nanomaterial hybrid digital circuits, IEE Micro and Nano Letters, vol. 2, no. 2, pp. 40-45, June 2007.

D. Chen, W. Wang, and S. Haruehanroengra, Efficient structures for CMOL circuits, IEE Micro and Nano Letters, vol. 1, no. 2, pp. 74-78, Dec. 2006.

W. Wang, Ming Liu, and A. Hsu, Hybrid nanoelectronics: Future of computer technology, Journal of Computer Science and Tech. vol. 21, pp. 871-886, Nov. 2006.

 R. Zhang, K. Walnut, W. Wang, and G. Jullien, A method of majority logic reduction for quantum cellular automata, IEEE Trans. Nanotech. vol. 3, no. 4, pp. 443-450, Dec. 2004.

U.S. Patents:

Wei Wang, New hybrid CMOS/nano circuits, US Patent, 2007

Wei Wang, FPGA based on resistive memory, US Provisional Patent, 2008