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Bin Yu

Dr. Bin Yu
Professor of Nanoengineering

Contact Information:

Degrees:

  • Ph.D. Electrical Engineering, University of California at Berkeley
  • M.S. Electrical Engineering, University of California at Berkeley
  • B.S. Electrical Engineering, Zhejiang University

Professional Background:

  • Professor, College of Nanoscale Science and Engineering, SUNY-Albany
  • Consulting Professor, Dept. of Electrical Engineering, Stanford University 
  • University of California/NASA Center for Nanotechnology, Mountain View, CA 
  • Strategic Research, Advanced Micro Devices, Inc., Sunnyvale, CA 
  • University of California at Berkeley, Electronics Research Laboratory

Areas of Research:  

  • Energy-efficient “green” electronics
  • 2D nanostructure-enabled electronics 
  • Nano-photovoltaics & energy harvesting 
  • Emerging micro and nano devices 
  • Self-assembly of functional nanomaterials

Awards, Honors & Professional Services:   

  • Fellow, Institute of Electrical and Electronics Engineers (IEEE)
  • IEEE Distinguished Lecturer, Electron Device Society 
  • NASA Innovation Award
  • IBM Faculty Award
  • Editor, IEEE Electron Device Letters (2001-2007)
  • Editor, Nano-Micro Letters (2010-now)
  • Associate Editor, IEEE Transactions on Nanotechnology (2007-2010)
  • Guest Editor, IEEE TED/TNANO Joint Special Issue (2007)
  • Editor, Materials Research Society Symposium (2003)
  • Draft Committee, International Technology Roadmap for Semiconductors (ITRS) 
  • National Nanotechnology Initiative/SRC Consultative Group, Novel Devices and System Architectures
  • Administrative Committee, IEEE Nanotechnology Council
  • Nanoelectronics Committee, IEEE Nanotechnology Council 
  • Fellows Evaluating Committee, IEEE Nanotechnology Council 
  • Ex-Officio AdCom, IEEE Electron Device Society 
  • VLSI Technology and Circuit Committee, IEEE Electron Device Society
  • Guest Professor, Beijing University, China 
  • Guest Lecturer, Stanford University and University of California at Berkeley 
  • Adjunct Professor, Santa Clara University, Santa Clara, CA
  • Mentor, SRC University Research Programs, Stanford University 
  • Mentor, SRC University Research Programs, University of California at Berkeley 
  • Nominating Panel, IEEE George Smith Award
  • Senior advisory positions at venture capital, technology law firm, semiconductor chip companies, and nanotechnology startups in Silicon Valley, California
  • Review Panel, Semiconductor Research Corporation, NASA, Stanford University Global Climate and Energy Project, National Science Foundation, Department of Energy, Department of Defense 
  • Service on Advisory/Organizational/Technical Program Committees of many international conferences and symposiums

Selected Accomplishments:

  • Author, 5 book/contributed book chapters
  • Speaker, 60+ invited talks, seminars, and tutorials to international conferences, universities, industry, and professional societies

Inventions and Patents

  • Inventor, 295 awarded U.S. patents in nanotechnology and nanoelectronics
  • Inventor, several dozen awarded European/Japanese patents

Selected Invited Talks:

  • 2nd CMOC Symposium, Yale University, March 2013.
  • IEEE EDS Distinguished Lecture, Singapore, November 2012.
  • Non-Volatile Memory Technology Symposium, Singapore, November 2012.
  • International Conference on Solid-State and Integrated Circuit Technology, Xi’an, China, October 2012.
  • IEEE EDS Distinguished Lecture, Santa Clara Valley Chapter, CA, April 2011.
  • IEEE EDS Distinguished Lecture, Hong Kong University, China, June 2010.
  • Electrochemical Society Meeting, Vancouver, Canada, April 2010.
  • Brookhaven National Laboratory, Upton, NY, October 2009. 
  • IEEE EDS Distinguished Lecture, Fudan University, Shanghai, China, October 2009. 
  • Beijing University, China, October 2009. 
  • IEEE VLSI Test Symposium, San Diego, CA, April 2008. 
  • SanDisk Corporation, San Jose, CA, March 2008. 
  • IEEE EDS Distinguished Lecture, Santa Clara Valley Chapter, CA, January 2008. 
  • IEEE EDS Distinguished Lecture, Seoul National University, Republic of Korea, December 2007. 
  • Materials Research Society Fall Meeting, Boston, MA, November 2006. 
  • PIRA Nanoelectronics Conference, San Jose, CA, November 2006. 
  • International Conference on Solid-State Devices and Materials, Kanagawa, Japan, September 2006. 
  • American Institute of Chemical Engineers, Santa Clara, CA, February 2006. 
  • Paul Allen Center for Integrated Systems, Stanford University, Palo Alto, CA, January 2006. 
  • San Jose State University, San Jose, CA, October 2005. 
  • European Solid-State Device Research Conference, Grenoble, France, September 2005. 
  • Spring Workshop, American Vacuum Society, Sunnyvale, CA, May 2005. 
  • University of California, Berkeley, CA, February 2005. 
  • IBM Almaden Research Center, San Jose, CA, February 2005. 
  • University of California, Santa Cruz, CA, December 2004. 
  • Santa Clara University, Santa Clara, CA, November 2004. 
  • IBM Zurich Research Laboratory, Zurich, Switzerland, November 2004. 
  • National Nanotechnology Initiative/NIST Workshop on Nanotechnology, Gaithersburg, MD, January 2004. 
  • Nanoelectronics & Nanophotonics Conference, Palo Alto, CA, September 2003. 
  • University of California, Berkeley, CA, October 2002. 
  • Semiconductor Research Corporation (SRC), Topical Research Conference, Austin, TX, October 2002. 
  • IEEE Silicon Nanoelectronics Workshop, Honolulu, HI, June 2002. 
  • Beijing University, Beijing, China, April 2002. 
  • International Nanotechnology/Nanoelectronics Symposium, Beijing, China, October 2001. 
  • Applied Materials Corp., 2001.
  • Tokyo Institute of Technology, Yokohama, Japan, June 2001. 
  • NEC Research Lab, Sagamihara, Japan, June 2001. 
  • Conference Highlight Talk, Symposium on VLSI Technology, Kyoto, Japan, June 2001. 
  • SEMATECH, Austin, TX, May 2001.

    Guest Panelist:

    Invited Panelist, Rump Session on “Nanotechnology in Future ICs”, International Conference on Solid State Devices and Materials, Yokohama, Japan, September 2006

    Invited Panelist, IEEE Gate Workfunction Engineering Workshop, Stanford University, Palo Alto, CA, June 2003

    Invited Panelist, Rump Session on “Emerging Nanoelectronic Devices”, Semiconductor Research Corporation Topical Research Conference, Austin, TX, October 2002

    Invited Panelist, Rump Session on “Novel Device Structures”, Symposium on VLSI Technology, Honolulu, HI, June 2002

    Invited Panelist, Rump Session on “Scaling Limit of Silicon”, Device Research Conference, Notre Dame, IN, April 2001

    Recent Publications:

    T. Bansal, C. A. Durcan, N. Jain, R. B. Jacobs-Gedrim, Y. Xu, and B. Yu, “Synthesis of Few-to-Monolayer Graphene on Rutile Titanium Dioxide,” Carbon, 55, 168-175 (2013).

    N. Jain, T. Bansal, C. A. Durcan, Y. Xu, and B. Yu, “Monolayer Graphene/Hexagonal Boron Nitride Heterostructure,” Carbon, 54, 396–402 (2013).

    X. Lin, S. Lin, Y. Xu, A. A. Hakro, T. Hasan, B. Zhang, B. Yu, J. Luo, E. Li, and H. Chen, “Ab initio study of electronic and optical behavior of two-dimensional silicon carbide,” J. Mater. Chem. C, 1, 2131-2135 (2013).

    M. Shanmugam, C. A. Durcan, R. Jacobs-Gedrim, and B. Yu, “Layered Semiconductor Tungsten Disulfide: Photoactive Material in Bulk Heterojunction Solar Cells,” Nano Energy, accepted.

    B. Gao, B. Chen, F. Zhang, L. Liu, X. Liu, J. Kang, H. Yu, and B. Yu, “A Novel Defect-Engineering-Based Implementation for High-Performance Multilevel Data Storage in Resistive Switching Memory,” IEEE Transactions on Electron Devices, accepted.

    M. Shanmugam, T. Bansal, C. Durcan, and B. Yu, “Schottky-Barrier Solar Cell Based on Layered Semiconductor Tungsten Disulfide Nanofilm," Applied Physics Letters, 101, 263902 (2012). 

    R. B. Jacobs-Gedrim, C. A. Durcan, N. Jain, and B. Yu, “Chemical Assembly and Electrical Characteristics of Surface-Rich Topological Insulator Bi2Se3 Nanoplates and Nanoribbons,” Applied Physics Letters, 101, 143103 (2012).

    M. Shanmugam, C. A. Durcan, and B. Yu, “Layered Semiconductor Molybdenum Disulfide Nanomembrane Based Schottky-Barrier Solar Cells,” Nanoscale, 4, 7399-7405 (2012).

    Y. Liu, Y. Xu, X. Lin, H. Chen, S. Lin, B. Yu, and J. Luo, “Ab Initio Study of Energy-Band Modulation in Graphene-Based Two-Dimensional Layered Superlattices,” Journal of Materials Chemistry, 22, 23821-23829 (2012).

    G. Gupta, M. B. A. Jalil, B. Yu, and G. Liang, “Performance Evaluation of Electro-Optic Effect Based Graphene Transistors,” Nanoscale, 4, 6365-6373 (2012).

    E. Kim, N. Jain, R. Jacobs-Gedrim, Y. Xu, and B. Yu, “Exploring Carrier Transport Phenomena in CVD-Assembled Graphene FET on Hexagonal Boron Nitride,” Nanotechnology, 23, 125706 (2012).

    M. Shanmugam, T. Bansal, C. A. Durcan, and B. Yu, “Molybdenum Disulphide/Titanium Dioxide Nanocomposite-Poly3-Hexylthiophene Bulk Heterojunction Solar Cell,” Applied Physics Letters, 100, 153901 (2012).

    Y. Xu, H. Gao, H. Chen, Y. Yuan, K. Zhu, H. Chen, Z. Jin, and B. Yu, “Electronic Transport Anisotropy of Buckling Graphene Under Uniaxial Compressive Strain: Ab initio Study,” Applied Physics Letters, 100, 052111 (2012).

    Y. Xu, K. Zhu, S. Yan, Z. Jin, Y. Wang, H. Chen, J. Luo, and B. Yu, “Quantum and Thermo-mechanical Noise Squeezing in Nanoresonators: A Comparative Study,” Applied Physics Letters, 100, 023105, (2012).

    M. Shanmugam, T. Bansal, C. A. Durcan, and B. Yu, “Multi-Layer Graphene Oxide/Cadmium Selenide Quantum Dot Coated Titanium Dioxide Heterojunction Solar Cell,” IEEE Electron Device Letters, vol. 33, no. 8, 1165-1167 (2012).

    N. Jain, T. Bansal, C. Durcan, and B. Yu, “Graphene-Based Interconnects on Hexagonal Boron Nitride (h-BN) Substrate,” IEEE Electro Device Letters, vol. 33, no. 7, 925-927 (2012).

    E. Kim, N. Jain, Y. Xu, and B. Yu, “Logic Inverter Implemented with CVD-Assembled Graphene FET on Hexagonal Boron Nitride,” IEEE Transactions on Nanotechnology, vol. 11, no. 3, 619-623 (2012).

    M. Shanmugam, T. Bansal, C. Durcan, and B. Yu, “MoS2/TiO2 Nanoparticle Composite Bulk Heterojunction Solar Cell,” Proc. IEEE NanoTechnology Conference (2012).

    N. Jain, T. Bansal, C. Durcan, and B. Yu, “Substrate Effect on Graphene-Based Interconnects,” Proc. IEEE NanoTechnology Conference (2012).

    E. Kim, N. Jain, Y. Xu, Y. Han, and B. Yu, “CVD-Graphene Complementary Logic on Ultra-Thin Multi-Layer Hexagonal Boron Nitride,” MRS Proceedings, DOI: http://dx.doi.org/10.1557/opl.2012.660, Volume 1407 (2012).

    T. Yu, E. Kim, N. Jain, and B. Yu, “Multi-Layer Graphene-Based Carbon Interconnect,” MRS Proceedings, DOI: http://dx.doi.org/10.1557/opl.2012.348, Volume 1407 (2012).

    T. Sohier and B. Yu, “Ultralow-Voltage Design of Graphene PN Junction Quantum Reflective Switch Transistor,” Applied Physics Letters, 98, 213104 (2011).

    E. Kim, T. Yu, E. S. Song, and B. Yu, “Chemical Vapor Deposition-Assembled Graphene Field-Effect Transistor on Hexagonal Boron Nitride,” Applied Physics Letters, 98, 262103 (2011).

    T. Yu, C. Kim, C.-W. Liang, and B. Yu, “Formation of Graphene P-N Junction via Complementary Doping,” IEEE Electron Device Letters, vol. 32, no. 8, 1050-1052 (2011).

    T. Wang, B. Yu, Y. Liu, Q. Guo, K. Sheng, and M. J. Deen, “Fabrication of Vertical stacked Single-Crystalline Si Nanowires Using Self-Limiting Oxidation,” Nanotechnology, 23, 015307 (2011).

    T. Yu, C.-W. Liang, C. Kim, E.-S. Song, and B. Yu, “Three-Dimensional Stacked Multilayer Graphene Interconnects,” IEEE Electron Device Letters, vol. 32, no. 8, 1110-1112 (2011).

    Y. Xu, Z. Guo, H. Chen, Y. Yuan, J. Lou, X. Lin, H. Gao, H. Cheng, and B. Yu, “In-Plane and Tunneling Pressure Sensors Based on Graphene/Hexagonal Boron Nitride Heterostructures,” Applied Physics Letters, 99, 133109 (2011).

    Y. Xu, H. Gao, M. Li, S. Guo, H. Chen, Z. Jin, and B. Yu, " Electronic Transport in Monolayer Graphene with Extreme Physical Deformation: ab initio Density Functional Calculation", Nanotechnology, 22, 365202 (2011).

    T. Yu, E. Kim, N. Jain, and B. Yu, “Carbon-Based Interconnect: Performance, Scaling and Reliability of 3D Stacked Multilayer Graphene System,” Tech. Dig. IEEE International Electron Devices Meeting, 159-162 (2011).

    T. Yu, E.-K. Lee, B. Briggs, B. Nagabhirava, and B. Yu, “Graphene/Copper Hybrid On-Chip Interconnect: A Reliability Study,” IEEE Transactions on Nanotechnology, vol. 10, no. 4, 710-714 (2011).

    J. Liu, B. Yu, and M. P. Anantram, “Scaling Analysis of Nanowire Phase-Change Memory,” IEEE Electron Device Letters, vol. 32, no. 10, 1340-1342 (2011).

    T. Yu, C.-W. Liang, C. Kim, and B. Yu, “Local Electrical Stress-Induced Doping and Formation of Monolayer Graphene P-N Junction,” Applied Physics Letters, 98, 243105 (2011).

    B. Gao, J. Kang, L. Liu, X. Liu, and B. Yu, “A Physical Model for Bipolar Oxide-Based Resistive Switching Memory Based on Ion-Transport-Recombination Effect,” Applied Physics Letters, 98, 232108 (2011).

    H. Zhang, L. Liu, B. Gao, Y. Qiu, X. Liu, J. Lu, R. Han, J. Kang, and B. Yu, “Gd-Doping Effect on Performance of HfO2 Based Resistive Switching Memory Devices Using Implantation Approach,” Applied Physics Letters, 98, 042105 (2011).

    Q. Guo, T. Wang, K. Sheng, and B, Yu, “An Optimization of Bosch Etch Process for Vertically Stacked Si Nanowires,” Journal of Materials Science: Materials in Electronics, 23, 1, 334-342 (2011).

    B. Chen, B. Gao, S. W. Sheng, L. F. Liu, X. Y. Liu, Y. S. Chen, Y. Wang, R. Q. Han, B. Yu, and J. F. Kang, “A Novel Operation Scheme for Oxide-Based Resistive-Switching Memory Devices to Achieve Controlled Switching Behaviors,” IEEE Electron Device Letters, vol. 32 no. 3, 282-284 (2011).

    Y. Liu, W. Wang, T. Wang, Q. Guo, K. Sheng, and B. Yu, “Tunable Bandgap of AB-Stacking Bilayer Graphene under Applied Electric Fields for Power Devices,” Proc. International Conference on Artificial Intelligence, Management Science and Electronic Commerce (AIMSEC), 6040-6043 (2011).

    B. Gao, H. Zhang, B. Chen, L. Liu, X. Liu, R. Han, J. Kang, Z. Fang, H. Yu, B. Yu, and D.-L. Kwong, “Modeling of Retention Failure Behavior in Bipolar Oxide-Based Resistive Switching Memory,” IEEE Electron Device Letters, vol. 32, no. 3, 276-278 (2011).

    W. Wang, Y. Liu, T. Wang, K. Sheng, and B. Yu, “Graphene/Cu (111) Interface Study: the Density Functional Theory Calculations,” Proc. International Conference on Electronics, Communications and Control, 265-268 (2011).

    B. Briggs, B. Nagabhirava, G. Rao, R. Geer, H. Gao, Y. Xu, and B. Yu, “Electro-Mechanical Robustness of Monolayer Graphene with Extreme Bending,” Applied Physics Letters, 97, 223102 (2010).

    T. Yu, E.-K. Lee, B. Briggs, B. Nagabhirava, and B. Yu, “Bilayer Graphene System: Current-Induced Reliability Limit,” IEEE Electron Device Letters, vol. 31, no. 10, 1155-1157 (2010).

    H. Zhang, B. Gao, B. Sun, G. Chen, L. Zeng, L. Liu, X. Liu, J. Lu, R. Han, J. Kang, and B. Yu, “Ionic Doping Effect in ZrO2 Resistive Switching Memory,” Applied Physics Letters, 96, 123502 (2010).

    Recent Presentations:

    C. Durcan, R. Jacobs-Gedrim, N. Jain, and B. Yu, “Nanosheets of Layered Semiconductor Molybdenum Disulfide: CVD Growth and Characterization,” Material Research Society Fall Meeting, Boston, MA, November 25-30, 2012.

    R. Jacobs-Gedrim, C. Durcan, N. Jain, and B. Yu, “Bismuth Selenide Topological Insulator Nanoplates and Nanoribbons: Vapor-Solid Growth and Characterization,” Material Research Society Fall Meeting, Boston, MA, November 25-30, 2012.

    M. Shanmugam, C. Durcan, R. Jacobs-Gedrim, and B. Yu, “Two-Dimensional Layered Semiconductor / TiO2 Nanoparticles Based Bulk Heterojunction Solar Cells,” Material Research Society Fall Meeting, Boston, MA, November 25-30, 2012.

    T. Bansal, N. Jain, and B. Yu, “Metal-Catalyst-Free Growth of Graphene on High-K Dielectric,” Material Research Society Fall Meeting, Boston, MA, November 25-30, 2012.

    M. Shanmugam, C. Durcan, R. Jacobs-Gedrim, and B. Yu, “Layer Transferred MoS2 Nanomembranes in Schottky Solar Cell,” Material Research Society Fall Meeting, Boston, MA, November 25-30, 2012.

    M. Shanmugam, C. Durcan, and B. Yu, “Carrier Transport and Recombination at Multilayer Graphene Oxide/CdSe/TiO2 Interfaces in Heterojunction Solar Cell,” Material Research Society Fall Meeting, Boston, MA, November 25-30, 2012.

    N. Jain, C. Durcan, Y. Xu, and B. Yu, “Hexagonal Boron Nitride (h-BN): Functional, Scalable and Robust Gate Dielectric for High-Performance Graphene Electronics,” Material Research Society Fall Meeting, Boston, MA, November 25-30, 2012.

    B. Yu, “Phase-Change Nanowire: Synthesis, Materials Behavior, and Devices,” IEEE Non-Volatile Memory Technology Symposium, Singapore, October 31 - November 2, 2012.

    B. Yu, “Graphene Nanoelectronics: Overview from Post-Silicon Perspective,” International Conference on Solid-State and Integrated Circuit Technology, Xi’an, China, October 29 - November 1, 2012.

    B. Yu, “Graphene-Enabled Electronics: Devices and Interconnects,” Electronics Packaging Symposium, Niskayuna, NY, October 9-10, 2012.

    M. Shanmugam, T. Bansal, C. Durcan, and B. Yu, “MoS2/TiO2 Nanoparticle Composite Bulk Heterojunction Solar Cell,” IEEE NanoTechnology Conference, Birmingham, UK, August 20-23, 2012.

    N. Jain, T. Bansal, C. Durcan, and B. Yu, “Substrate Effect on Graphene-Based Interconnects,” IEEE NanoTechnology Conference, Birmingham, UK, August 20-23, 2012.

    J.F. Kang, B. Gao, B. Chen, L.F. Liu, X.Y. Liu, Z.R. Wang, H. Y. Yu, and B. Yu, “Oxide-Based RRAM: A Novel Defect-Engineering-Based Implementation For Multilevel Data Storage,” International Memory Workshop, Milano, Italy, May 20-23, 2012.

    E. Kim, N. Jain, Y. Xu, and B. Yu, “Layered Boron Nitride: Key Building Elements for Graphene Electronics,” Material Research Society Spring Meeting, San Francisco, CA, April 9-13, 2012.

    X. Lin, H. A. Ali, Y. Xu, H. Chen, and B. Yu, “Optical Properties of Graphene/BN and Graphene/Fluorinated Graphene Heterostructures,” Material Research Society Spring Meeting, San Francisco, CA, April 9-13, 2012.

    J. Liu, B. Yu, A. Anantram, “Theoretical scaling analysis of phase change memory,” Material Research Society Spring Meeting, San Francisco, CA, April 9-13, 2012.

    T. Yu, E. Kim, N. Jain, and B. Yu, “Carbon-Based Interconnect: Performance, Scaling and Reliability of 3D Stacked Multilayer Graphene System,” IEEE International Electron Devices Meeting, Washington D.C., December 5-7, 2011.

    E. Kim, N. Jain, Y. Xu, and B. Yu, “Carbon Electronics Implemented with Graphene-On-Boron-Nitride (GOBON) Material System,” Workshop on Frontiers in Electronics, San Juan, Puerto Rico, December 18-21, 2011.

    E. Kim, N. Jain, Y. Xu, Y. Han, and B. Yu, “CVD-Graphene Complementary Logic on Ultra-Thin Multi-Layer Hexagonal Boron Nitride,” Material Research Society Fall Meeting, Boston, MA, November 26-30, 2011.

    T. Yu, E. Kim, N. Jain, and B. Yu, “Multi-Layer Graphene-Based Carbon Interconnect,” Material Research Society Fall Meeting, Boston, MA, November 26-30, 2011.

    J. Liu, B. Yu, and M. P. Anantram, “Analysis of the RESET Performance of Nanowire Phase Change Memory,” IEEE Nanotechnology Conference, Portland, OR, August 15-18, 2011.

    Y. Liu, W. Wang, T. Wang, Q. Guo, K. Sheng, and B. Yu, “Tunable Bandgap of AB-Stacking Bilayer Graphene under Applied Electric Fields for Power Devices,” International Conference on Artificial Intelligence, Management Science and Electronic Commerce (AIMSEC), Deng Feng, China, August 8-10, 2011.

    C. Kim and B. Yu, “Carbon-Based Transistor Demonstrated with CVD Graphene on Hexagonal Boron Nitride (hBN) Substrate,” 71st Physical Electronics Conference, Albany, NY, June 14-17, 2011.

    N. Jain, T. Yu and B. Yu, “Complementary Doping for Logic Application with CVD-Assembled Monolayer Graphene,” 71st Physical Electronics Conference, Albany, NY, June 14-17, 2011.

    B. Yu, “Graphene Tunneling Barrier Enabled Logic Switch,” 219th Electrochemical Society Meeting, Montreal, Canada, May 1-6, 2011.

    C. Kim, B. Nagabhirava, T. Wang, Y. Han, and B. Yu, “Electrical/Optical Characterization of Bandgap-Engineered Bilayer Graphene,” Material Research Society Spring Meeting, San Francisco, CA, April 25–29, 2011.

    B. Nagabhirava and B. Yu, “CVD Growth of Graphene with Micro-Engineered Metal Catalyst,” Material Research Society Spring Meeting, San Francisco, CA, April 25–29, 2011.

    B. Nagabhirava, J. Liu, A. P. Manjeri, and B. Yu, “Phase-change GeTe Nanowire: Synthesis, Material Scalability, and Key Properties,” Material Research Society Spring Meeting, San Francisco, CA, April 25–29, 2011.

    J. Liu, B. Yu, and M. P. Anantram, “Multi-Scale Simulation of Nanowire Phase Change Memory,” Material Research Society Spring Meeting, San Francisco, CA, April 25–29, 2011.

    B. Nagabhirava, H. Gao, Y. Xu, and B. Yu, “3-D Non-Planar Monolayer Graphene Transistor,” Material Research Society Meeting, Boston, MA, November 29-December 3, 2010.

    T. Yu, B. Nagabhirava, and B. Yu, “Stacked Multilayer Graphene (SMLG): Basic Material and Electrical Properties,” Material Research Society Meeting, Boston, MA, November 29-December 3, 2010.

    H. Gao, Y. Xu, B. Yu, and Z. Jin, “Electronic Transport Properties of Graphene with Extreme Mechanical Deformation,” Material Research Society Meeting, Boston, MA, November 29-December 3, 2010.

    T. Yu, E.-K. Lee, B. Briggs, B. Nagabhirava, and B. Yu, “Bilayer Graphene System: Transport and Reliability,” 217th Electrochemical Society Meeting, Vancouver, Canada, April 25-30, 2010.